Dorsey’s Block Reports on Development of Bitcoin Mining Solution

Also announced a deal with Intel

Block Inc. (formerly Square Inc.), led by Jack Dorsey, has announced the development status of a mining solution for the crypto asset (virtual currency) Bitcoin (BTC).

The announcement was made on the 28th of last month, reporting that the development of ASICs has progressed significantly since the start of the project. He also revealed that he had assembled a design team to begin development and signed a deal to purchase large quantities of ASICs from semiconductor giant Intel. Block’s primary purpose in developing its own mining solution is to decentralize the industry.

ASIC is an electronic circuit (integrated circuit) specialized for cryptocurrency mining. ASIC is widely used in Bitcoin mining today, but development requires technology and time, and there are only a few companies that supply equipment, and it is centralized. and pointed out the problem.

Block argued that this supply imbalance is having a negative impact on miners and the Bitcoin network.

The main purpose of the company to develop mining solutions is to solve this problem. In the future, we plan to open source Block’s mining technology, and we also aim to provide hardware and software solutions to other companies.

In this announcement, he expressed hope that the contract with Intel will accelerate development. Block’s head of hardware, Thomas Templeton, told blockchain media CoinDesk that the product will be available as early as next year.

We have an update on our mining initiative. This one is about ASICshttps://t.co/bJOM9YNxfl

—Thomas Templeton (@TempletonThomas) April 28, 2023

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Strengths of payment companies

Block has been considering building a mining system since the company name was Square. Square, Inc. is a major US payment company, and in this presentation, he explained that Square’s experience in developing ASICs in its sales management system can be put to good use.

connection: Square Inc. considers developing Bitcoin mining system

The company said that most ASIC devices currently on the market use 5-nanometer chips, and that it will focus on developing 3-nanometer chips in the future. The small size has the advantage of reducing power consumption and lowering costs.

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